MIPS ASE-16 |
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MD00076-2B-MIPS1632-AFP-02.63 |
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ADDIU rx, immediate |
MIPS16e |
Add Immediate Unsigned Word (2-Operand, Extended) |
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ADDIU rx, pc, immediate |
MIPS16e |
Add Immediate Unsigned Word (3-Operand, PC-Relative, Extended) |
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ADDIU rx, sp, immediate |
MIPS16e |
Add Immediate Unsigned Word (3-Operand, SP-Relative, Extended) |
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ADDIU ry, rx, immediate |
MIPS16e |
Add Immediate Unsigned Word (3-Operand, Extended) |
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ADDIU sp, immediate |
MIPS16e |
Add Immediate Unsigned Word (2-Operand, SP-Relative, Extended) |
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ADDU rz, rx, ry |
MIPS16e |
Add Unsigned Word (3-Operand) |
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AND rx, ry |
MIPS16e |
AND |
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ASMACRO select,p0,p1,p2,p3,p4 |
MIPS16e |
Application-Specific Macro Instruction |
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BEQZ rx, offset |
MIPS16e |
Branch on Equal to Zero (Extended) |
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BNEZ rx, offset |
MIPS16e |
Branch on Not Equal to Zero (Extended) |
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B offset |
MIPS16e |
Unconditional Branch (Extended) |
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BREAK immediate |
MIPS16e |
Breakpoint |
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BTEQZ offset |
MIPS16e |
Branch on T Equal to Zero (Extended) |
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BTNEZ offset |
MIPS16e |
Branch on T Not Equal to Zero (Extended) |
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CMPI rx, immediate |
MIPS16e |
Compare Immediate (Extended) |
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CMP rx, ry |
MIPS16e |
Compare |
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DIV rx, ry |
MIPS16e |
Divide Word |
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DIVU rx, ry |
MIPS16e |
Divide Unsigned Word |
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JALRC ra, rx |
MIPS16e |
Jump and Link Register, Compact |
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JALR ra, rx |
MIPS16e |
Jump and Link Register |
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JAL target |
MIPS16e |
Jump and Link |
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JALX target |
MIPS16e, MIPS32 |
Jump and Link Exchange (32-bit MIPS Format) |
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JRC ra |
MIPS16e |
Jump Register Through Register ra, Compact |
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JRC rx |
MIPS16e |
Jump Register Through MIPS16e GPR, Compact |
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JR ra |
MIPS16e |
Jump Register Through Register ra |
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JR rx |
MIPS16e |
Jump Register Through MIPS16e GPR |
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LB ry, offset(rx) |
MIPS16e |
Load Byte (Extended) |
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LBU ry, offset(rx) |
MIPS16e |
Load Byte Unsigned (Extended) |
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LH ry, offset(rx) |
MIPS16e |
Load Halfword (Extended) |
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LHU ry, offset(rx) |
MIPS16e |
Load Halfword Unsigned (Extended) |
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LI rx, immediate |
MIPS16e |
Load Immediate (Extended) |
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LW rx, offset(pc) |
MIPS16e |
Load Word (PC-Relative, Extended) |
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LW rx, offset(sp) |
MIPS16e |
Load Word (SP-Relative, Extended) |
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LW ry, offset(rx) |
MIPS16e |
Load Word (Extended) |
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MFHI rx |
MIPS16e |
Move From HI Register |
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MFLO rx |
MIPS16e |
Move From LO Register |
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MOVE r32, rz |
MIPS16e |
Move |
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MOVE ry, r32 |
MIPS16e |
Move |
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MULT rx, ry |
MIPS16e |
Multiply Word |
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MULTU rx, ry |
MIPS16e |
Multiply Unsigned Word |
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NEG rx, ry |
MIPS16e |
Negate |
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NOP |
MIPS16e Assembly Idiom |
No Operation |
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NOT rx, ry |
MIPS16e |
Not |
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OR rx, ry |
MIPS16e |
Or |
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RESTORE {ra,}{s0/s1/s0-1,}{framesize} (All args are optional) |
MIPS16e |
Restore Registers and Deallocate Stack Frame |
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RESTORE {ra,}{xsregs,}{aregs,}{framesize}(All arguments optional) |
MIPS16e |
Restore Registers and Deallocate Stack Frame (Extended) |
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SAVE {ra,}{s0/s1/s0-1,}{framesize} (All arguments are optional) |
MIPS16e |
Save Registers and Set Up Stack Frame |
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SAVE {ra,}{xsregs,}{aregs,}{framesize} (All arguments optional) |
MIPS16e |
Save Registers and Set Up Stack Frame (Extended) |
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SB ry, offset(rx) |
MIPS16e |
Store Byte (Extended) |
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SDBBP code |
MIPS16e, EJTAG |
Software Debug Breakpoint |
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SEB rx |
MIPS16e |
Sign-Extend Byte |
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SEH rx |
MIPS16e |
Sign-Extend Halfword |
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SH ry, offset(rx) |
MIPS16e |
Store Halfword (Extended) |
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SLL rx, ry, sa |
MIPS16e |
Shift Word Left Logical (Extended) |
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SLLV ry, rx |
MIPS16e |
Shift Word Left Logical Variable |
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SLTI rx, immediate |
MIPS16e |
Set on Less Than Immediate (Extended) |
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SLTIU rx, immediate |
MIPS16e |
Set on Less Than Immediate Unsigned (Extended) |
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SLT rx, ry |
MIPS16e |
Set on Less Than |
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SLTU rx, ry |
MIPS16e |
Set on Less Than Unsigned |
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SRA rx, ry, sa |
MIPS16e |
Shift Word Right Arithmetic (Extended) |
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SRAV ry, rx |
MIPS16e |
Shift Word Right Arithmetic Variable |
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SRL rx, ry, sa |
MIPS16e |
Shift Word Right Logical (Extended) |
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SRLV ry, rx |
MIPS16e |
Shift Word Right Logical Variable |
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SUBU rz, rx, ry |
MIPS16e |
Subtract Unsigned Word |
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SW ra, offset(sp) |
MIPS16e |
Store Word (SP-Relative, Extended) |
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SW rx, offset(sp) |
MIPS16e |
Store Word (SP-Relative) |
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SW ry, offset(rx) |
MIPS16e |
Store Word (Extended) |
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XOR rx, ry |
MIPS16e |
Exclusive OR |
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ZEB rx |
MIPS16e |
Zero-Extend Byte |
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ZEH rx |
MIPS16e |
Zero-Extend Halfword |
MIPS ASE-16e2 |
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MD01172-2B-MIPS16e2-AFP-01.00 |
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ADDIU rx, gp, immediate |
MIPS16e2 |
Add Immediate Unsigned Word (3-Operand, GP-Relative, Extended) |
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ANDI rx, immediate |
MIPS16e2 |
AND Immediate Extended |
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CACHE op, immediate(rx) |
MIPS16e2 |
Perform Cache Opereation Extended |
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DI |
MIPS16e2 |
Disable Interrupts Extended |
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DI ry |
MIPS16e2 |
Disable Interrupts Extended |
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DMT |
MIPS16e2 |
Disable Multi-Threaded Execution Extended |
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DMT ry |
MIPS16e2 |
Disable Multi-Threaded Execution Extended |
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DVPE |
MIPS16e2 |
Disable Virtual Processor Execution Extended |
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DVPE ry |
MIPS16e2 |
Disable Virtual Processor Execution Extended |
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EHB |
MIPS16e2 |
Execution Hazard Barrier Extended |
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EI |
MIPS16e2 |
Enable Interrupts Extended |
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EI ry |
MIPS16e2 |
Enable Interrupts Extended |
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EMT |
MIPS16e2 |
Enable Multi-Threaded Execution Extended |
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EMT ry |
MIPS16e2 |
Enable Multi-Threaded Execution Extended |
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EVPE |
MIPS16e2 |
Enable Virtual Processor Execution Extended |
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EVPE ry |
MIPS16e2 |
Enable Virtual Processor Execution Extended |
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EXT ry, rx, pos, size |
MIPS16e2 |
Extract Bit Field Extended |
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INS ry, $0, pos, size |
MIPS16e2 |
Insert Bit Field 0 Extended |
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INS ry, rx, pos, size |
MIPS16e2 |
Insert Bit Field Extended |
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LB rx, immediate(gp) |
MIPS16e2 |
Load Byte (GP-relative) Extended |
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LBU rx, immediate(gp) |
MIPS16e2 |
Load Byte Unsigned (GP-relative) Extended |
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LH rx, immediate(gp) |
MIPS16e2 |
Load Halfword (GP-relative) Extended |
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LHU rx, immediate(gp) |
MIPS16e2 |
Load Halfword Unsigned Extended |
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LL rx, immediate(rb) |
MIPS16e2 |
Load Linked Word Immediate |
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LUI rx, immediate |
MIPS16e2 |
Load Upper Immediate Extended |
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LWL rx, immediate(rb) |
MIPS16e2 |
Load Word Left Extended |
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LWR rx, immediate(rb) |
MIPS16e2 |
Load Word Right Extended |
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LW rx, immediate(gp) |
MIPS16e2 |
Load Word (GP-Relative, Extended) |
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MFC0 ry, r32, sel |
MIPS16e2 |
Move from Coprocessor 0 Extended |
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MOVN rx, $0, ry |
MIPS16e2 |
Move Conditional on Not Equal to Zero Extended |
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MOVN rx, rb, ry |
MIPS16e2 |
Move Conditional on Not Equal to Zero Extended |
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MOVTN rx, $0 |
MIPS16e2 |
Move Conditional on T Not Equal to Zero Extended |
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MOVTN rx, rb |
MIPS16e2 |
Move Conditional on T Not Equal to Zero Extended |
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MOVTZ rx, $0 |
MIPS16e2 |
Move Conditional on T Equal to Zero Extended |
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MOVTZ rx, rb |
MIPS16e2 |
Move Conditional on T Equal to Zero Extended |
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MOVZ rx, $0, ry |
MIPS16e2 |
Move Conditional on Equal to Zero Extended |
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MOVZ rx, rb, ry |
MIPS16e2 |
Move Conditional on Equal to Zero Extended |
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MTC0 ry, r32, sel |
MIPS16e2 |
Move to Coprocessor 0 Extended |
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ORI rx, immediate |
MIPS16e2 |
Or Immediate Extended |
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PAUSE |
MIPS16e2 |
Wait for the LLBit to Clear Extended |
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PREF hint,immediate(rx) |
MIPS16e2 |
Prefetch Extended |
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RDHWR ry,HWR |
MIPS16e2 |
Read Hardware Register Extended |
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SB rx, immediate(gp) |
MIPS16e2 |
Store Byte (GP-relative) Extended |
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SC rx, immediate(rb) |
MIPS16e2 |
Store Conditional Word Extended |
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SH rx, immediate(gp) |
MIPS16e2 |
Store Halfword (GP-relative) |
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SWL rx, immediate(rb) |
MIPS16e2 |
Store Word Left Extended |
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SWR rx, immediate(rb) |
MIPS16e2 |
Store Word Right Extended |
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SW rx, immediate(gp) |
MIPS16e2 |
Store Word (GP-relative) Extended |
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SYNC stype |
MIPS16e2 |
Synchronize Shared Memory Extended |
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XORI rx, immediate |
MIPS16e2 |
Exclusive OR Immediate Extended |