Encoding:

EXTEND

11110

00

Imm[8:5]

00

rb

LWSP

10010

rx

sel = 7

Imm[4:0]

5

5

4

2

3

5

3

3

5

Format: 

LWL rx, immediate(rb)

MIPS16e2

Load Word Left Extended

Purpose:

Load Word Left Extended

To load the most-significant part of a word as a signed value from an unaligned memory address

Description: 

GPR[rx] = GPR[rx] MERGE memory[GPR[rb] + immediate]

The 9-bit signedimmediate value is added to the contents of GPR rb to formm an effictive address (EffAddr).

Restrictions:

Unpredictable prior to MIPS16e2.

Operation: 

vAddr = sign_extend(immediate) + GPR[XLat[rb]]
(pAddr, CCA) = AddressTranslation (vAddr, DATA, LOAD)
pAddr = pAddrPSIZE-1..2 || (pAddr1..0 xor ReverseEndian2)
if BigEndianMem = 0 then
   pAddr = pAddrPSIZE-1..2 || 02
endif
byte = vAddr1..0 xor BigEndianCPU2
memword = LoadMemory (CCA, byte, pAddr, vAddr, DATA)
temp = memword7+8*byte..0 || GPR[XLat[rx]]23-8*byte..0
GPR[XLat[rx]] = temp

Exceptions:

None

TLB Refill, TLB Invalid, Bus Error, Address Error, Watch

Programming Notes:

The architecture provides no direct support for treating unaligned words as unsigned values, that is, zeroing bits

63..32 of the destination register when bit 31 is loaded.