EXTEND 11110 |
offset 10:5 |
offset 15:11 |
BEQZ 00100 |
rx |
0 000 |
offset 4:0 |
5 |
6 |
5 |
5 |
3 |
3 |
5 |
BEQZ rx, offset |
MIPS16e |
Branch on Equal to Zero (Extended) |
Branch on Equal to Zero (Extended)
To test a GPR then do a PC-relative conditional branch.
if (GPR[rx] = 0) then branch
The 16-bit offset is shifted left 1 bit, sign-extended, and then added to the address of the instruction after the branch to form the target address. If the contents of GPR rx are equal to zero, the program branches to the target address.
None
I: tgt_offset = sign_extend(offset || 0) condition = (GPR[Xlat(rx)] = 0GPRLEN) if condition then PC = PC + 4 + tgt_offset endif
None
In MIPS16e mode, the branch offset is interpreted as halfword-aligned. This is unlike 32-bit MIPS mode, which interprets the offset value as word-aligned.