EXTEND 11110 |
LSB (pos) |
1 |
MSB (pos+size-1) |
SHIFT 00110 |
rx |
ry |
sel = 1 |
SLL 00 |
5 |
5 |
1 |
5 |
5 |
3 |
3 |
3 |
2 |
INS ry, rx, pos, size |
MIPS16e2 |
Insert Bit Field Extended |
Insert Bit Field Extended
To merge a right-justified bit field from GPR rx info a specified field in GPR ry
GPR[ry] = InsertField(GPR[ry], GPR[rx], msbd, lsb)
TThe right-most size bits from GPR rx are merged into the value GPR ry starting at bit position pos. The result is placed back in GPR ry.
In implementations prior to MIPS16e2, this instriction yields unpredicable result. It would typically be executed as an SLL instruction. The operation is UNPREDICTABLE if lsb > msb.
if lsb > msb)then UNPREDICTABLE endif GPR[XLat[ry]] = GPR[XLat[ry]]31..msb+1 || GPR[XLat[rx]]msb-lsb..0 || GPR[XLat[ry]]lsb-1..0
None
GPR[XLat[ry]] = GPR[XLat[ry]]31..msb+1 || GPR[XLat[ry]]msb-lsb..0 || GPR[XLat[ry]]lsb-1..0
None