RRR 11100 |
rx |
ry |
rz |
ADDU 01 |
5 |
3 |
3 |
3 |
2 |
ADDU rz, rx, ry |
MIPS16e |
Add Unsigned Word (3-Operand) |
Add Unsigned Word (3-Operand)
To add 32-bit integers.
GPR[rz] = GPR[rx] + GPR[ry]
The contents of GPR rxand GPR ryare added together to form a 32-bit result. The result is placed into GPR rz.
No integer overfl w exception occurs under any circumstances.
None
temp = GPR[Xlat(rx)] + GPR[Xlat(ry)] GPR[Xlat(rz)] = temp
None
The term "unsigned" in the instruction name is a misnomer;this operation is 32-bit modulo arithmetic that does not trap on overfl w. It is appropriate for unsigned arithmetic, such as address arithmetic, or integer arithmetic environments that ignore overfl w, such as C language arithmetic.