|
EXTEND 11110 |
imm 10:5 |
imm 15:11 |
ADDIU8 01001 |
rx |
0 000 |
imm 4:0 |
|
5 |
6 |
5 |
5 |
3 |
3 |
5 |
ADDIU rx, immediate |
MIPS16e |
Add Immediate Unsigned Word (2-Operand, Extended) |
Add Immediate Unsigned Word (2-Operand, Extended)
To add a constant to a 32-bit integer.
GPR[rx] = GPR[rx] + immediate
The 16-bit immediate is sign-extended and then added to the contents of GPR rx to form a 32-bit result. The result is placed in GPR rx.
No integer overfl w exception occurs under any circumstances.
None
temp = GPR[Xlat(rx)] + sign_extend(immediate) GPR[Xlat(rx)] = temp
None
The term "unsigned" in the instruction name is a misnomer;this operation is 32-bit modulo arithmetic that does not trap on overfl w. It is appropriate for unsigned arithmetic, such as address arithmetic, or integer arithmetic environments that ignore overfl w, such as C language arithmetic.