EXTEND 11110 |
Imm[10:5] |
Imm[15:11] |
SWSP 11010 |
rx |
sel = 2 |
Imm[4:0] |
5 |
5 |
5 |
5 |
5 |
3 |
3 |
SH rx, immediate(gp) |
MIPS16e2 |
Store Halfword (GP-relative) |
Store Halfword (GP-relative)
To store a halfword to memory.
memory[GPR[gp] + immediate] = GPR[rx]
The 16-bit immediate value is sign-extended, and then added to the contents of GPR 28 to form the effective address.
The least-significant halfword of GPR rx is stored at the effective address.
Unpredictable prior to MIPS16e2. The effective address must be naturally-aligned. If the least-significant bit of the address is non-zero, an Address Error exception occurs.
vAddr = sign_extend(immediate) + GPR[28] (pAddr, CCA) = AddressTranslation (vAddr, DATA, STORE) pAddr = pAddrPSIZE-1..2 || (pAddr11..0 xor (ReverseEndian || 0)) bytesel = vAddr11..0 xor (BigEndianCPU || 0) dataword = GPR[Xlat[rx]]31-8*bytesel..0 || 08*bytesel StoreMemory (CCA, HALFWORD, dataword, pAddr, vAddr, DATA)
TLB Refill, TLB Invalid, TLB Modified, Bus Error, Address Error.