EXTEND 11110 |
select |
p4 |
p3 |
RRR 11100 |
p2 |
p1 |
p0 |
5 |
3 |
3 |
5 |
5 |
3 |
3 |
5 |
ASMACRO select,p0,p1,p2,p3,p4 |
MIPS16e |
Application-Specific Macro Instruction |
The formatlisted is the most generic assemblerformat and is unlikely to be used for an actualimplementation of application-specifi macro instructions. Rather, the assembler format is likely to represent the use of the macro, with the assembler turning that format into the appropriate bit pattern required by the instruction.
Application-Specific Macro Instruction
To execute an implementation-definable macro instruction
The ASMACRO instruction is the programming interface to the implementation-definabl macro instruction facility that is defined by the MIPS16e architecture
The selectfielspecifie which of 8 possible macros is expanded. The definitioof each macro specifiehow the parameters p0, p1, p2, p3, and p4 are substituted into the 32-bit instructions with which the macro is defined The execution of the 32-bit instructions occurs while PC remains unchanged.
Itis implementation-dependent whether a processorimplements any implementation-definabl macro instructions and, if it does, how many. It is implementation-dependent whether the macro is executed with interrupts disabled.
The 32-bit instructions with which the macro is define must by chosen with care. Issues of atomicity, restartability of the instruction sequence, and similar factors must be considered when using the implementation-definabl macro instruction facility. Failure to do so can cause UNPREDICTABLE behavior.
If implementation-definabl macro instructions are not implemented by the processor, or if the select fielreferences a specific macro which is not implemented by the processo , a Reserved Instruction exception is signaled.
ExecuteMacro(sel,p0,p1,p2,p3,p4)
Reserved Instruction
Others as may be generated by the 32-bit instructions included in each macro expansion.
Implementations may impose certain restrictions on 32-bitinstructions are supported within an ASMACRO instruction. For instance, many implementations may not allow loads, stores, branches or jumps within an ASMACRO defi nition. Refer to the Users Guide for each processor which implements this capability for a list of macros define and implemented by that processor, and for any specific restrictions imposed by that processo .