Encoding:

EXTEND

11110

offset 10:5

offset 15:11

LWPC

10110

rx

0

000

offset 4:0

5

6

5

5

3

3

5

Format:

LW rx, offset(pc)

MIPS16e

Load Word (PC-Relative, Extended)

Purpose:

Load Word (PC-Relative, Extended)

To load a PC-relative word from memory as a signed value.

Description:

GPR[rx] = memory[PC + offset]

The 16-bit offsetis sign-extended and added to the address of the LW instruction;this forms the effective address.

Before the addition,the 2 lower bits ofthe instruction address are cleared. The contents ofthe 32-bit word atthe memory location specified by the e fective address are loaded into GPR rx.

Restrictions:

A PC-relative, extended LW may not be placed in the delay slot of a jump instruction.

The effective address must be naturally-aligned. If either of the 2 least-significanbits of the address is non-zero, an

Address Error exception occurs.

Operation:

vAddr = (PCGPRLEN-1..2 || 02) + sign_extend(offset)
if vAddr1..0 != 02 then
   SignalException(AddressError)
endif
(pAddr, CCA) = AddressTranslation (vAddr, DATA, LOAD)
memword = LoadMemory (CCA, WORD, pAddr, vAddr, DATA)
GPR[Xlat(rx)] = memword

Exceptions:

TLB Refill, TLB I valid, Bus Error, Address Error

Programming Note

For the purposes of watchpoints (provided by the CP0 WatchHi and WatchLo registers) and EJTAG breakpoints, the

PC-relative reference is considered to be a data, rather than an instruction reference. That is, the watchpoint or breakpoint is triggered only if enabled for data references.