Encoding:

Format:

DIVU rx, ry

Purpose:

Divide Unsigned Word

To divide 32-bit unsigned integers.

Description:

 (LO, HI) = GPR[rx] / GPR[ry]

The 32-bit word value in GPR rx is divided by the 32-bit value in GPR ry, treating both operands as unsigned values.

The 32-bit quotient is placed into special register LO, and the 32-bit remainder is placed into special register HI.

Restrictions:

If the divisor in GPR ry is zero, the arithmetic result is UNPREDICTABLE.

Operation:

q = (0 || GPR[Xlat(rx)]) div (0 || GPR[Xlat(ry)])
r = (0 || GPR[Xlat(rx)]) mod (0 || GPR[Xlat(ry)])
LO = q
HI = r

Exceptions:

None

Programming Notes:

See "Programming Notes" for the DIV instruction.

Historical Perspective:

In MIPS 1 through MIPS III, if either of the two instructions preceding the divide is an MFHI or MFLO, the result of the MFHI or MFLO is UNPREDICTABLE. Reads of the HI or LO special register must be separated from subsequent instructions that write to them by two or more instructions. This restriction was removed in MIPS IV and

MIPS32 and all subsequent levels of the architecture.