TLBR |
nanoMIPS. Required on TLB cores. Requires CP0 privilege. |
TLB Read |
TLB Read. Read the TLB entry indexed by C0.Index into the TLB CP0 registers EntryHi,EntryLo0, EntryLo1, PageMask.
nanoMIPS. Required on TLB cores. Requires CP0 privilege.
|
001000 |
x |
00 |
01001 |
101 |
111 |
111 |
|
6 |
10 |
2 |
5 |
3 |
3 |
3 |
if not got_tlb():
raise exception('RI')
if not IsCoprocessor0Enabled():
raise coprocessor_exception(0)
tlbr()
Coprocessor Unusable. Reserved Instruction if TLB not implemented.