SBE rt, offset(rs) |
nanoMIPS. Optional, present when Config5.EVA=1. Requires CP0 privilege. |
Store Byte using EVA addressing |
Store Byte using EVA addressing.
Store byte from register $rt to virtual address $rs +
offset,translating the virtual address as though the core is in user mode, although it is actually in kernel mode.
nanoMIPS. Optional, present when Config5.EVA=1. Requires CP0 privilege.
|
101001 |
rt |
rs |
s[8] |
0001 |
0 |
10 |
s[7:0] |
|
6 |
5 |
5 |
1 |
4 |
1 |
2 |
8 |
offset = sign_extend(s, from_nbits=9)
if not C0.Config5.EVA:
raise exception('RI')
if not IsCoprocessor0Enabled():
raise coprocessor_exception(0)
va = effective_address(GPR[rs], offset, 'Store', eva=True)
data = zero_extend(GPR[rt], from_nbits=8)
write_memory_at_va(data, va, nbytes=1, eva=True)
Address Error. Bus Error. Coprocessor Unusable. Reserved Instruction if EVA not implemented. TLB Invalid. TLB Modified. TLB Refill. Watch.