Assembly:

MFC0 rt, c0s, sel

Purpose:

Move From Coprocessor 0. Write value of CP0 register indexed by c0s, sel to register $rt.

Availability:

nanoMIPS. Requires CP0 privilege.

Format:

Operation:

if not IsCoprocessor0Enabled():
    raise coprocessor_exception(0)
value = read_cp0_register(c0s, sel)
GPR[rt] = sign_extend(value, from_nbits=32)

An MFC0 which targets a register which is not used on the current core will return zero.

Exceptions:

Coprocessor Unusable.