Assembly: 

LSA rd, rs, rt, u2

nanoMIPS

Load Scaled Address

Purpose:

Load Scaled Address. Add register $rs scaled by a left shift u2 to register $rt and place the32 bit result in register $rd.

Availability:

nanoMIPS

Format:

001000

rt

rs

rd

u2

x

001

111

6

5

5

5

2

3

3

3

Operation: 

sum = (GPR[rs] << u2) + GPR[rt]
GPR[rd] = sign_extend(sum, from_nbits=32)

In nanoMIPS™,the shift field directly encodes the shift amount, meaning thatthe supported shift values are in the range 0 to 3 (instead of 1 to 4 in MIPSR6™).

Exceptions:

None.