LHX rd, rs(rt) |
nanoMIPS |
Load Half indeXed |
Load Half indeXed. Load signed halfword to register $rd from memory address $rt + $rs(register plus register).
nanoMIPS
001000 |
rt |
rs |
rd |
0100 |
0 |
000 |
111 |
6 |
5 |
5 |
5 |
4 |
1 |
3 |
3 |
va = effective_address(GPR[rs], GPR[rt], 'Load') data = read_memory_at_va(va, nbytes=2) GPR[rd] = sign_extend(data, from_nbits=16)
Address Error. Bus Error. TLB Invalid. TLB Read Inhibit. TLB Refill. Watch.