LBUE rt, offset(rs) |
nanoMIPS. Optional, present when Config5.EVA=1. Requires CP0 privilege. |
Load Byte Unsigned using EVA addressing |
Load Byte Unsigned using EVA addressing. Load unsigned byte to register $rt from virtualaddress $rs + offset, translating the virtual address as though the core is in user mode, although it is actually in kernel mode.
nanoMIPS. Optional, present when Config5.EVA=1. Requires CP0 privilege.
101001 |
rt |
rs |
s[8] |
0010 |
0 |
10 |
s[7:0] |
6 |
5 |
5 |
1 |
4 |
1 |
2 |
8 |
offset = sign_extend(s, from_nbits=9) if not C0.Config5.EVA: raise exception('RI') if not IsCoprocessor0Enabled(): raise coprocessor_exception(0) va = effective_address(GPR[rs], offset, 'Load', eva=True) GPR[rt] = read_memory_at_va(va, nbytes=1, eva=True)
Address Error. Bus Error. Coprocessor Unusable. Reserved Instruction if EVA not implemented. TLB Invalid. TLB Read Inhibit. TLB Refill. Watch.