Assembly:

EVP rt

Purpose:

Enable VirtualProcessors.Enableallvirtualprocessorsinaphysicalcore.Set

VPControl.DIS to 0, and place the previous value of the VPControl CP0 register in register $rt.

Availability:

nanoMIPS. Optional, present when Config5.VP=1, otherwise NOP. Requires CP0 privilege.

Format:

Operation:

if C0.Config5.VP == 0:
    # No operation when VP not implemented pass
else:
    if not IsCoprocessor0Enabled():
        raise coprocessor_exception(0)
    GPR[rt] = C0.VPControl
    C0.VPControl.DIS = 0
    enable_virtual_processors()

The EVP instruction is used on VP cores to undo the effect of a DVP instruction, and the reader should refer to the DVP description for details regarding its usage.

The EVP instruction behaves like a NOP on cores which do not implement virtual processors (i.e. when Config5.VP=0). This behavior allows kernel code to enclose critical sequences within DVP/EVP blocks

without first checking whether itis running on a VP core.The encoding ofthe EVP instruction is equivalentto a SLTU instruction targeting $0,i.e.a NOP, which leads to the correct behavior on

non-VP cores with no additional hardware special casing.

Exceptions:

Coprocessor Unusable.