Encoding:

P32A

001000

rt

rs

rd

x

0011101

101

6

5

5

5

1

7

3

Format: 

PRECRQ.PH.W rd, rs, rt

DSP

Precision Reduce Fractional Words to Fractional Halfwords

Purpose:

Precision Reduce Fractional Words to Fractional Halfwords

Reduce the precision of two fractional words to produce two fractional halfword values.

Description: 

rd = rt31..16 || rs31..16

The 16 most-significant bits from each of the Q31 fractional word values in registers rs and rt are written to destination register rd, creating a vector of two Q15 fractional values. The fractional word from the rs register is used to create the left-most Q15 fractional value in rd, and the fractional word from the rt register is used to create the right-most

Q15 fractional value.

Restrictions:

No data-dependent exceptions are possible.

The operands must be values in the specified format. If they are not, the results are UNPREDICTABLE and the values of the operand vectors become UNPREDICTABLE.

Operation: 

ValidateAccessToDSPResources()
tempB15..0 = GPR[rs]31..16
tempA15..0 = GPR[rt]31..16
GPR[rd]31..0 = tempB15..0 || tempA15..0

Exceptions:

Reserved Instruction, DSP Disabled