Encoding:

P32A

001000

rt

rs

1101001

100

111

111

6

5

5

7

3

3

3

Format: 

PRECEU.PH.QBRA rt, rs

DSP

Precision Expand Two Unsigned Bytes to Unsigned Halfword Values

Purpose:

Precision Expand Two Unsigned Bytes to Unsigned Halfword Values

Expand the precision of two unsigned byte values taken from the two right-alternate aligned positions of a quad byte vector to create two unsigned halfword values.

Description: 

rt = expand_prec8u16(rs23..16) || expand_prec8u16(rs7..0)

The two right-alternate aligned unsigned integer byte values from the four byt e elements in re gister rs are each expanded to unsigned halfword values and written to destination register rt. The precision expansion is achieved by pre-pending eight most-significant zero bits to the original byte value to generate each 16 bit unsigned halfword value.

Restrictions:

No data-dependent exceptions are possible.

The operands must be values in the specified format. If they are not, the results are UNPREDICTABLE and the values of the operand vectors become UNPREDICTABLE.

Operation: 

ValidateAccessToDSPResources()
tempB15..0 = 08 || GPR[rs]23..16
tempA15..0 = 08 || GPR[rs]7..0
GPR[rt]31..0 = tempB15..0 || tempA15..0

Exceptions:

Reserved Instruction, DSP Disabled