Encoding:

P32A

001000

rt

rs

rd

x

0110101

101

6

5

5

5

1

7

3

Format: 

PACKRL.PH rd, rs, rt

DSP

Pack a Vector of Halfwords from Vector Halfword Sources

Purpose:

Pack a Vector of Halfwords from Vector Halfword Sources

Pick two elements for a halfword vector using the right halfword and left halfword respectively from the two source registers.

Description: 

rd = rs15..0 || rt31..16

The right halfword element from register rs and the left halfword from register rt are packed into the two halfword positions of the destination register rd.

Restrictions:

No data-dependent exceptions are possible.

The operands must be values in the specified format. If they are not, the results are UNPREDICTABLE and the values of the operand vectors become UNPREDICTABLE.

Operation: 

ValidateAccessToDSPResources()
tempB15..0 = GPR[rs]15..0
tempA15..0 = GPR[rt]31..16
GPR[rd]31..0 = tempB15..0 || tempA15..0

Exceptions:

Reserved Instruction, DSP Disabled