P32A 001000 |
rt |
rs |
ac |
11 |
000 |
010 |
111 |
111 |
6 |
5 |
5 |
2 |
2 |
3 |
3 |
3 |
3 |
DPAU.H.QBR ac, rs, rt |
DSP |
Dot Product with Accumulate on Vector Unsigned Byte Elements |
Dot Product with Accumulate on Vector Unsigned Byte Elements
Element-wise multiplication of the two right-most elements of the four elements of each of two vectors of unsigned bytes, accumulating the sum of the products into the specified 64-bit accumulator register.
ac = ac + zero_extend((rs15..8 * rt15..8) + (rs7..0 * rt7..0))
The two right-most elements of the four unsigned byte elements of each of registers rt and rs are multiplied together using unsigned arithmetic to generate two 16-bit unsigned intermediate products. The intermediate products are then zero-extended to 64 bits and accumulated into the specified 64-bit HI/LO accumulator.
The value of ac can range from 0 to 3; a v alue of 0 refers to the original HI/LO register pair of the MIPS32 architecture.
This instruction does not set any bits in the ouflag field in the DSPControl register.
No data-dependent exceptions are possible.
The operands must be values in the specified format. If they are not, the result is UNPREDICTABLE and the values of the operand vectors become UNPREDICTABLE.
ValidateAccessToDSPResources() tempB15..0 = multiplyU8U8( GPR[rs]15..8, GPR[rs]15..8 ) tempA15..0 = multiplyU8U8( GPR[rs]7..0, GPR[rs]7..0 ) dotp63..0 = ( 048 || tempB15..0 ) + ( 048 || tempA15..0 ) tempC63..0 = ( HI[ac]31..0 || LO[ac]31..0 ) + dotp63..0 ( HI[ac]31..0 || LO[ac]31..0 ) = tempC63..32 || tempC31..0
Reserved Instruction, DSP Disabled