Encoding:

Format:

BALIGN rt, rs, bp

EXTW rt, rs, rt, 8*(4-bp)

Purpose:

Byte Align Contents from Two Registers

Create a word result by combining a specified number of bytes from each of two source registers.

Description:

rt = (rt << 8*bp) || (rs >> 8*(4-bp))

The 32-bit word in register rt is left-shifted as a 32-bit value by bp byte positions, and the right-most word in register

rs is right-shifted as a 32-bit value by (4-bp) byte positions. The shifted values are then or-ed together to create a 32bit result that is written to destination register rt.

The argument bp is pr ovided by the i nstruction, and i s interpreted as an unsigned two-bit integer taking values between zero and three.

Restrictions:

No data-dependent exceptions are possible.

Operation:

ValidateAccessToDSP2Resources()
if (bp1..0 = 0) or (bp1..0 = 2) then
   GPR[rt]31..0 = UNPREDICTABLE
else 
   temp31..0 = ( GPR[rt]31..0 << (8*bp1..0) ) || ( GPR[rs]31..0 >> (8*(4-bp1..0)) )
   GPR[rt]31..0 = temp31..0
endif

Implementation Notes:

When bp is equal to zero, no left-shift is performed. When bp is equal to two, the result is equivalent to a PACKRL operation when the destination register is identical to the first source register. The assembler is expected to map these two variants of the BALIGN instructions to the appropriate equivalents. The only valid values of bp that the hardware must implement are when bp is equal to 1 and 3. If this instruction is passed through to the hardware with bp value equal to 0 or 2, the result is UNPREDICTABLE.

Exceptions:

Reserved Instruction, DSP Disabled