SPECIAL3 011111 |
0 00000 |
rt |
rd |
WSBH 00010 |
BSHFL 100000 |
6 |
5 |
5 |
5 |
5 |
6 |
WSBH rd, rt |
MIPS32 Release 2 |
Word Swap Bytes Within Halfwords |
Word Swap Bytes Within Halfwords
To swap the bytes within each halfword of GPR rt and store the value into GPR rd.
GPR[rd] = SwapBytesWithinHalfwords(GPR[rt])
Within each halfword of the lower word of GPR rt the bytes are swapped, the result is sign-extended, and stored in
GPR rd.
In implementations prior to Release 2 of the architecture, this instruction resulted in a Reserved Instruction exception.
If GPR rt does not contain a sign-extended 32-bit value (bits 63..31 equal), then the result of the operation is
UNPREDICTABLE.
if NotWordValue(GPR[rt]) then UNPREDICTABLE endif GPR[rd] = sign_extend(GPR[rt]23..16 || GPR[rt]31..24 || GPR[rt]7..0 || GPR[rt]15..8)
Reserved Instruction
The WSBH instruction can be used to convert halfword and word data of one endianness to another endianness. The endianness of a word value can be converted using the following sequence:
lw t0, 0(a1) /* Read word value */ wsbh t0, t0 /* Convert endiannes of the halfwords */ rotr t0, t0, 16 /* Swap the halfwords within the words */
Combined with SEH and SRA, two contiguous halfwords can be loaded from memory, have their endianness converted, and be sign-extended into two word values in four instructions. For example:
lw t0, 0(a1) /* Read two contiguous halfwords */ wsbh t0, t0 /* Convert endiannes of the halfwords */ seh t1, t0 /* t1 = lower halfword sign-extended to word */ sra t0, t0, 16 /* t0 = upper halfword sign-extended to word */
Zero-extended words can be created by changing the SEH and SRA instructions to ANDI and SRL instructions, respectively.
.