Encoding:

SPECIAL

000000

0

00000

rt

rd

sa

SLL

000000

6

5

5

5

5

6

Format:

SLL rd, rt, sa 

MIPS32

Shift Word Left Logical

Purpose:

Shift Word Left Logical

To left-shift a word by a fixed number of bits.

Description:

 GPR[rd] = GPR[rt] << sa

The contents of the low-order 32-bit word of GPR rt are shifted left, inserting zeros into the emptied bits. The word result is sign-extended and placed in GPR rd. The bit-shift amount is specified by sa.

Restrictions:

None

Operation:

s = sa
temp = GPR[rt](31-s)..0 || 0s
GPR[rd] = sign_extend(temp)

Exceptions:

None

Programming Notes:

The SLL input operand does not have to be a properly sign-extended word value to produce a valid sign-extended

32-bit result. The result word is always sign-extended into a 64-bit destination register; this instruction with a zero shift amount truncates a 64-bit value to 32 bits and sign-extends it.

SLL r0, r0, 0, expressed as NOP, is the assembly idiom used to denote no operation.

SLL r0, r0, 1, expressed as SSNOP, is the assembly idiom used to denote no operation that causes an issue break on superscalar processors.