Encoding:

Format:

MOVT.fmt 

MOVT.S fd, fs, cc

MOVT.D fd, fs, cc

MOVT.PS fd, fs, cc

Purpose:

Floating Point Move Conditional on Floating Point True

To test an FP condition code then conditionally move an FP value.

Description:

 if FPConditionCode(cc) = 1 then FPR[fd] = FPR[fs]

If the floating point condition code specified by CC is one, then the value in FPR fs is placed into FPR fd. The source and destination are values in format fmt.

If the condition code is not one, then FPR fs is not copied and FPR fd contains its previous value in format fmt. If fd did not contain a value either in format fmt or previously unused data from a load or move-to operation that could be interpreted in format fmt, then the value of fd becomes UNPREDICTABLE.

MOVT.PS merges the lower half of FPR fs into the lower half of FPR fd if condition code CC is one, and independently merges the upper half of FPR fs into the upper half of FPR fd if condition code CC+1 is one. The CC field should be even; if it is odd, the result of this operation is UNPREDICTABLE.

The move is non-arithmetic; it causes no IEEE 754 exceptions, and the FCSR_Cause and FCSR_Flags fields are not modified.

Restrictions:

The fields fs and fd must specify FPRs valid for operands of type fmt. If the fields are not valid, the result is UNPREDICTABLE. The operand must be a value in format fmt; if it is not, the result is UNPREDICTABLE and the value of the operand FPR becomes UNPREDICTABLE.

The result of MOVT.PS is UNPREDICTABLE if the processor is executing in the FR=0 32-bit FPU register model.

It is predictable if executing on a 64-bit FPU in the FR=1 mode, but not with FR=0, and not on a 32-bit FPU.

Availability and Compatibility

This instruction has been removed in Release 6 and has been replaced by the 'SEL.fmt' instruction. Refer to the

SEL fmt instruction in this manual for more information. Release 6 does not support Paired Single (PS).

Operation:

if fmt != PS
   if FPConditionCode(cc) = 1 then
      StoreFPR(fd, fmt, ValueFPR(fs, fmt))
   else
      StoreFPR(fd, fmt, ValueFPR(fd, fmt))
   endif
else
   mask = 0
   if FPConditionCode(cc+0) = 0 then mask = mask or 0xF0 endif
   if FPConditionCode(cc+1) = 0 then mask = mask or 0x0F endif
   StoreFPR(fd, PS, ByteMerge(mask, fd, fs))
endif

Exceptions:

Coprocessor Unusable, Reserved Instruction

Floating Point Exceptions:

Unimplemented Operation