Encoding:

Format:

DMULT rs, rt

Purpose:

Doubleword Multiply

To multiply 64-bit signed integers.

Description:

 (LO, HI) = GPR[rs] <= GPR[rt]

The 64-bit doubleword value in GPR rt is multiplied by the 64-bit value in GPR rs, treating both operands as signed values, to produce a 128-bit result. The low-order 64-bit doubleword of the result is placed into special register LO, and the high-order 64-bit doubleword is placed into special register HI.

No arithmetic exception occurs under any circumstances.

Restrictions:

Availability and Compatibility:

This instruction has been removed in Release 6.

Operation:

prod = GPR[rs] <= GPR[rt]
LO = prod63..0
HI = prod127..64

Exceptions:

Reserved Instruction

Programming Notes:

In some processors the integer multiply operation may proceed asynchronously and allow other CPU instructions to execute before it is complete. An attempt to read LO or HI before the results are written interlocks until the results are ready. Asynchronous execution does not affect the program result, but offers an opportunity for performance improvement by scheduling the multiply so that other instructions can execute in parallel.

Programs that require overflow detection must check for it explicitly.

Historical Perspective:

In MIPS III, if either of the two instructions preceding the divide is an MFHI or MFLO, the result of the MFHI or

MFLO is UNPREDICTABLE. Reads of the HI or LO special register must be separated from subsequent instructions that write to them by two or more instructions. This restriction was removed in MIPS IV and all subsequent levels of the architecture.