COP0 010000 |
DMT 00101 |
rt |
rd |
0 0000 0000 |
sel |
6 |
5 |
5 |
5 |
8 |
3 |
MIPS64
DMTC0 rt, rd, sel |
MIPS64 |
Doubleword Move to Coprocessor 0 |
Doubleword Move to Coprocessor 0
To move a doubleword from a GPR to a coprocessor 0 register.
CPR[0,rd,sel] = GPR[rt]
The contents of GPR rt are loaded into the coprocessor 0 register specified in the rd and sel fields. Not all coprocessor
0 registers support the sel field. In those instances, the sel field must be zero.
The results are UNDEFINED if coprocessor 0 does not contain a register as specified by rd and sel, or if the coprocessor 0 register specified by rd and sel is a 32-bit register.
// 'Width' returns width (32/64) of data returned by CPR. if ((Width(CPR[0,rd,sel]) = 32) and (ConfigAR>=2) ) then dataword <- GPR[rt]31:0 CPR[0,rd,sel] <- dataword elseif ((Width(CPR[0,rd,sel]) = 32) and (ConfigAR<2)) then UNDEFINED else datadoubleword <- GPR[rt] CPR[0,rd,sel] <- datadoubleword endif
Coprocessor Unusable, Reserved Instruction