Encoding:

COP0

010000

DMF

00001

rt

rd

0

0000 0000

sel

6

5

5

5

8

3

Format:

DMFC0 rt, rd, sel

MIPS64

Doubleword Move from Coprocessor 0

Purpose:

Doubleword Move from Coprocessor 0

To move the contents of a coprocessor 0 register to a general purpose register (GPR).

Description:

 GPR[rt] = CPR[0,rd,sel]

The contents of the coprocessor 0 register are loaded into GPR rt. Note that not all coprocessor 0 registers support the

sel field. In those instances, the sel field must be zero.

Restrictions:

The results are UNDEFINED if coprocessor 0 does not contain a register as specified by rd and sel, or if the coprocessor 0 register specified by rd and sel is a 32-bit register.

Operation:

// 'Width' returns width (32/64) of data returned by CPR
if ((Width(CPR[0,rd,sel])  = 32) and (ConfigAR>=2) ) then
   dataword = CPR[0,rd,sel] 
   GPR[rt] = { x0000_0000 || dataword}
elseif ((Width(CPR[0,rd,sel])  = 32) and (ConfigAR<2)) then 
   UNDEFINED
else
   datadoubleword = CPR[0,rd,sel] 
   GPR[rt] = datadoubleword
endif

Exceptions:

Coprocessor Unusable, Reserved Instruction