SPECIAL3 011111 |
rs |
rt |
msbd (size-1) |
lsbminus32 (pos-32) |
DEXTU 000010 |
6 |
5 |
5 |
5 |
5 |
6 |
DEXTU rt, rs, pos, size |
MIPS64 Release 2 |
Doubleword Extract Bit Field Upper |
Doubleword Extract Bit Field Upper
To extract a bit field from GPR rs and store it right-justified into GPR rt.
GPR[rt] = ExtractField(GPR[rs], msbd, lsb)
The bit field starting at bit pos and extending for size bits is extracted from GPR rs and stored zero-extended and right-justified in GPR rt. The assembly language arguments pos and size are converted by the assembler to the instruction fields msbd (the most significant bit of the destination field in GPR rt), in instruction bits 15..11, and
lsbminus32 (least significant bit of the source field in GPR rs, minus32), in instruction bits 10..6, as follows:
msbd = size-1 lsbminus32 = pos-32 lsb = lsbminus32 + 32 msb = lsb+msbd
For this instruction, the values of pos and size must satisfy all of the following relations:
32 <= pos < 64 0 < size <= 32 32 < pos+size <= 64
In implementations prior to Release 2 of the architecture, this instruction resulted in a Reserved Instruction exception.
The operation is UNPREDICTABLE if (lsb + msbd + 1) > 64.
lsb = lsbminus32 + 32 if ((lsb + msbd + 1) > 64) then UNPREDICTABLE endif GPR[rt] = 063-(msbd+1) || GPR[rs]msbd+lsb..pos
Reserved Instruction
Programming Notes
The assembler will accept any value of pos and size that satisfies the relationship 0 < pos+size <= 64 and emit DEXT,
DEXTM, or DEXTU as appropriate to the values. Programmers should always specify the DEXT mnemonic and let the assembler select the instruction to use.