REGIMM 000001 |
rs |
BGEZALL 10011 |
offset |
6 |
5 |
5 |
16 |
BGEZALL rs, offset |
MIPS32, removed in Release 6 |
Branch on Greater Than or Equal to Zero and Link Likely |
Branch on Greater Than or Equal to Zero and Link Likely
To test a GPR then do a PC-relative conditional procedure call; execute the delay slot only if the branch is taken.
if GPR[rs] >= 0 then procedure_call_likely
Place the return address link in GPR 31. The return link is the address of the second instruction following the branch, where execution continues after a procedure call.
An 18-bit signed offset (the 16-bit offset field shifted left 2 bits) is added to the address of the instruction following the branch (not the branch itself), in the branch delay slot, to form a PC-relative effective target address.
If the contents of GPR rs are greater than or equal to zero (sign bit is 0), branch to the effective target address after the instruction in the delay slot is executed. If the branch is not taken, the instruction in the delay slot is not executed.
Processor operation is UNPREDICTABLE if a control transfer instruction (CTI) is placed in the delay slot of a branch or jump.
Branch-and-link Restartability: GPR 31 must not be used for the source register rs, because such an instruction does
not have the same effect when reexecuted. The result of executing such an instruction is UNPREDICTABLE. This restriction permits an exception handler to resume execution by reexecuting the branch when an exception occurs in the branch delay slot.
This instruction has been removed in Release 6.
I: target_offset = sign_extend(offset || 02) condition = GPR[rs] >= 0GPRLEN GPR[31] = PC + 8 I+1: if condition then PC = PC + target_offset else NullifyCurrentInstruction() endif
None
With the 18-bit signed instruction offset, the conditional branch range is ± 128 KBytes. Use jump and link (JAL) or jump and link register (JALR) instructions for procedure calls to addresses outside this range.
Some implementations always predict the branch will be taken, so there is a significant penalty if the branch is not taken. Software should only use this instruction when there is a very high probability (98% or more) that the branch will be taken. If the branch is not likely to be taken or if the probability of a taken branch is unknown, software is encouraged to use the BGEZAL instruction instead.
In the MIPS I architecture, this instruction signaled a Reserved Instruction exception.