BALC 111010 |
offset |
6 |
26 |
BALC offset |
MIPS32 Release 6 |
Branch and Link, Compact |
Branch and Link, Compact
To do an unconditional PC-relative procedure call.
procedure_call (no delay slot)
Place the return address link in GPR 31. The return link is the address of the instruction immediately following the branch, where execution continues after a procedure call. (Because compact branches have no delay slots, see below.)
A 28-bit signed offset (the 26-bit offset field shifted left 2 bits) is added to the address of the instruction following the branch (not the branch itself), to form a PC-relative effective target address.
Compact branches do not have delay slots. The instruction after the branch is NOT executed when the branch is taken.
This instruction is an unconditional, always taken, compact branch. It does not have a forbidden slot, that is, a
Reserved Instruction exception is not caused by a Control Transfer Instruction placed in the slot following the branch.
This instruction is introduced by and required as of Release 6.
Release 6 instruction BALC occupies the same encoding as pre-Release 6 instruction SWC2. The SWC2 instruction has been moved to the COP2 major opcode in MIPS Release 6.
None
target_offset = sign_extend( offset || 02 ) GPR[31] = PC+4 PC = PC+4 + sign_extend(target_offset)