ADDI 001000 |
rs |
rt |
immediate |
6 |
5 |
5 |
16 |
ADDI rt, rs, immediate |
MIPS32, removed in Release 6 |
Add Immediate Word |
Add Immediate Word
To add a constant to a 32-bit integer. If overflow occurs, then trap.
GPR[rt] = GPR[rs] + immediate
The 16-bit signed immediate is added to the 32-bit value in GPR rs to produce a 32-bit result.
If the addition results in 32-bit 2's complement arithmetic overflow, the destination register is not modified and an Integer Overflow exception occurs.
If the addition does not overflow, the 32-bit result is sign-extended and placed into GPR rt.
If GPR rs does not contain a sign-extended 32-bit value (bits 63..31 equal), then the result of the operation is
UNPREDICTABLE.
This instruction has been removed in Release 6. The encoding has been reused for other instructions introduced by
Release 6.
if NotWordValue(GPR[rs]) then UNPREDICTABLE endif temp = (GPR[rs]31||GPR[rs]31..0) + sign_extend(immediate) if temp32 != temp31 then SignalException(IntegerOverflow) else GPR[rt] = sign_extend(temp31..0) endif
Integer Overflow
ADDIU performs the same arithmetic operation but does not trap on overflow.