Encoding:

Format:

ADD.fmt 

ADD.S fd, fs, ft

ADD.D fd, fs, ft

ADD.PS fd, fs, ft

Purpose:

Floating Point Add

To add floating point values.

Description:

FPR[fd] = FPR[fs] + FPR[ft]

The value in FPR ft is added to the value in FPR fs. The result is calculated to infinite precision, rounded by using to the current rounding mode in FCSR, and placed into FPR fd. The operands and result are values in format fmt.

ADD.PS adds the upper and lower halves of FPR fs and FPR ft independently, and ORs together any generated exceptions.

The Cause bits are ORed into the Flag bits if no exception is taken.

Restrictions:

The fields fs, ft, and fd must specify FPRs valid for operands of type fmt. If the fields are not valid, the result is

UNPREDICTABLE.

The operands must be values in format fmt. If the fields are not, the result is UNPREDICTABLE and the value of the operand FPRs becomes UNPREDICTABLE.

The result of ADD.PS is UNPREDICTABLE if the processor is executing in the FR=0 32-bit FPU register model.

ADD.PS is predictable if executing on a 64-bit FPU in the FR=1 mode, but not with FR=0, and not on a 32-bit FPU.

Availability and Compatibility:

ADD.PS has been removed in Release 6.

Operation:

StoreFPR (fd, fmt, ValueFPR(fs, fmt) +fmt ValueFPR(ft, fmt))

Exceptions:

Coprocessor Unusable, Reserved Instruction

Floating Point Exceptions:

Unimplemented Operation, Invalid Operation, Inexact, Overflow, Underflow