|
COP0 010000 |
CO 1 |
0 000 0000 0000 0000 0000 |
TLBINV 000011 |
|
6 |
1 |
19 |
6 |
TLBINV |
MIPS32 |
TLB Invalidate |
TLB Invalidate
The TLBINV instruction is unmodiied from the base architectural deinition, except in an implementation supporting
GuestID:
When executing in Guest mode, if the GuestID read does not match GuestCtl1ID, then the TLB entry is not
modiied.
When executing in Root mode, if the GuestID read does not match GuestCtl1RID, then the TLB entry is not
modiied. Note that this only applies to the root TLB, invalidation of guest virtual address translations requires execution of the equivalent TLBGINV instruction sequence to modify the guest TLB.
Unchanged from the base architecture.
Unchanged from the base architecture.