Encoding:

Format:

DMTGC0 rt, rd, sel

Purpose:

Doubleword Move to Guest Coprocessor 0

To move a doubleword from a GPR to a guest context coprocessor 0 register.

Description:

 CPR[0,rd,sel] = GPR[rt]

The contents of GPR rt are loaded into the guest context coprocessor 0 register speciied in the rd and sel ields. Note that not all guest context coprocessor 0 registers support the sel ield. In those instances, the sel ield must be zero.

Restrictions:

The results are UNDEFINED if guest context coprocessor 0 does not contain a register as speciied by rd and sel, or if the guest context coprocessor 0 register speciied by rd and sel is a 32-bit register or the destination register is the

Guest.Count register.

The guest context does notimplementthe Virtualization Module. Use of this instruction in guest-kernel mode will result in a Reserved Instruction exception, taken in guest mode.

If access to Coprocessor 0 is not enabled, a Coprocessor Unusable Exception is signaled. If access to Coprocessor 0 is enabled but access to 64-bit operations is not enabled, a Reserved Instruction Exception is signaled.

Operation:

if IsCoprocessorEnabled(0) then
   if (Config3VZ = 0) then
      SignalException(ReservedInstruction, 0)
      break
   endif
   if(not Are64bitOperationsEnabled()) then
      SignalException(ReservedInstruction)
   endif
   datadoubleword = GPR[rt]
   CPR[0,rd,sel] = datadoubleword
else
   SignalException(CoprocessorUnusable, 0)
endif

Exceptions:

Coprocessor Unusable

Reserved Instruction