SPECIAL2 011100 |
rs |
rt |
0 |
PPERM 10010 |
MADDU 000001 |
6 |
5 |
5 |
5 |
5 |
6 |
PPERM rs, rt |
SmartMIPS Crypto |
Partial Permutation of Word Data into ACX-Hi-Lo Accumulator |
Partial Permutation of Word Data into ACX-Hi-Lo Accumulator
Perform a partial permutation of a 32-bit value into the ACX/Hi/Lo registers
(LO, HI, ACX) = (LO, HI, ACX) << 6 | GPR[rs] bits specified by contents of GPR[rt]
The extended accumulator formed by the ACX, HI, and LO registers is shifted left by six bits, and 32-bit word value in GPR rt is used as a permutation descriptor to select a set of six bits from GPR rs, to be written into the least significant six bits of the LO register.
The contents of the rt register are interpreted as follows:
0 |
Source of bit 5 |
Source of bit 4 |
Source of bit 3 |
Source of bit 2 |
Source of bit 1 |
Source of bit 0 |
2 |
5 |
5 |
5 |
5 |
5 |
5 |
No arithmetic exception occurs under any circumstances.
None
TEMP = ACX(ACXBITS-6)..0 || HI31..26 ACX = TEMPACXBITS..0 TEMP = HI25..0 || LO31..26 HI = sign_extend(TEMP) TEMP31...6 = LO25..0 BITSEL = GPR[rt]29..25 TEMP5 = GPR[rs]BITSEL BITSEL = GPR[rt]24..20 TEMP4 = GPR[rs]BITSEL BITSEL = GPR[rt]19..15 TEMP3 = GPR[rs]BITSEL BITSEL = GPR[rt]14..10 TEMP2 = GPR[rs]BITSEL BITSEL = GPR[rt]9..5 TEMP1 = GPR[rs]BITSEL BITSEL = GPR[rt]4..0 TEMP0 = GPR[rs]BITSEL LO = sign_extend(TEMP)
None