MSA 011110 |
010 |
df/m |
ws |
wd |
BIT 001010 |
6 |
3 |
7 |
5 |
5 |
6 |
SRARI.df |
Immediate Shift Right Arithmetic Rounded | |
SRARI.B wd,ws,m |
MSA |
Immediate Shift Right Arithmetic Rounded |
SRARI.H wd,ws,m |
MSA |
Immediate Shift Right Arithmetic Rounded |
SRARI.W wd,ws,m |
MSA |
Immediate Shift Right Arithmetic Rounded |
SRARI.D wd,ws,m |
MSA |
Immediate Shift Right Arithmetic Rounded |
Immediate Shift Right Arithmetic Rounded
Immediate bit count shift right arithmetic with rounding
wd[i] = ws[i] >>(rounded) m
The elements in v ector ws are shifted right arithmetic by m bits. The most significant discarded bit is added to the shifted value (for rounding) and the result is written to vector wd.
The operands and results are values in integer data format df.
No data-dependent exceptions are possible.
SRARI.B for i in 0 .. WRLEN/8-1 WR[wd]8i+7..8i = srar(WR[ws]8i+7..8i, m, 8) endfor SRARI.H for i in 0 .. WRLEN/16-1 WR[wd]16i+15..16i = srar(WR[ws]16i+15..16i, m, 16) endfor SRARI.W for i in 0 .. WRLEN/32-1 WR[wd]32i+31..32i = srar(WR[ws]32i+31..32i, m, 32) endfor SRARI.D for i in 0 .. WRLEN/64-1 WR[wd]64i+63..64i = srar(WR[ws]64i+63..64i, m, 64) endfor function srar(ts, n, b) if n = 0 then return ts else return ((tsb-1)n || tsb-1..n) + tsn-1 endif endfunction srar
Reserved Instruction Exception, MSA Disabled Exception.