MSA 011110 |
000 |
df/m |
ws |
wd |
BIT 001001 |
6 |
3 |
7 |
5 |
5 |
6 |
SLLI.df |
Immediate Shift Left | |
SLLI.B wd,ws,m |
MSA |
Immediate Shift Left |
SLLI.H wd,ws,m |
MSA |
Immediate Shift Left |
SLLI.W wd,ws,m |
MSA |
Immediate Shift Left |
SLLI.D wd,ws,m |
MSA |
Immediate Shift Left |
Immediate Shift Left
Immediate bit count shift left.
wd[i] = ws[i] << m
The elements in vector ws are shifted left by m bits. The result is written to vector wd.
The operands and results are values in integer data format df.
No data-dependent exceptions are possible.
SLLI.B t = m for i in 0 .. WRLEN/8-1 WR[wd]8i+7..8i = WR[ws]8i+8-t-1..8i || 0t endfor SLLI.H t = m for i in 0 .. WRLEN/16-1 WR[wd]16i+15..16i = WR[ws]16i+16-t-1..16i || 0t endfor SLLI.W t = m for i in 0 .. WRLEN/32-1 WR[wd]32i+31..32i = WR[ws]32i+32-t-1..32i || 0t endfor SLLI.D t = m for i in 0 .. WRLEN/64-1 WR[wd]64i+63..64i = WR[ws]64i+64-t-1..64i || 0t endfor
Reserved Instruction Exception, MSA Disabled Exception.