Encoding:

Format:

MOD_S.df 

MOD_S.B wd,ws,wt

MOD_S.H wd,ws,wt

MOD_S.W wd,ws,wt

MOD_S.D wd,ws,wt

Purpose:

Vector Signed Modulo

Vector signed remainder (modulo).

Description:

wd[i] = ws[i] mod wt[i]

The signed integer elements in vector ws are divided by signed integer elements in vector wt. The remainder of the same sign as the dividend is written to vector wd. If a divisor element vector wt is zero, the result value is UNPREDICTABLE.

The operands and results are values in integer data format df.

Restrictions:

No data-dependent exceptions are possible.

Operation:

MOD_S.B
   for i in 0 .. WRLEN/8-1
      WR[wd]8i+7..8i = WR[ws]8i+7..8i mod WR[wt]8i+7..8i
   endfor
MOD_S.H
   for i in 0 .. WRLEN/16-1
      WR[wd]16i+15..16i = WR[ws]16i+15..16i mod WR[wt]16i+15..16i
   endfor
MOD_S.W
   for i in 0 .. WRLEN/32-1
      WR[wd]32i+31..32i = WR[ws]32i+31..32i mod WR[wt]32i+31..32i
   endfor
MOD_S.D
   for i in 0 .. WRLEN/64-1
      WR[wd]64i+63..64i = WR[ws]64i+63..64i mod WR[wt]64i+63..64i
   endfor

Exceptions:

Reserved Instruction Exception, MSA Disabled Exception.