MSA 011110 |
110011001 |
df |
ws |
wd |
2RF 011110 |
6 |
9 |
1 |
5 |
5 |
6 |
FEXUPR.df |
Vector Floating-Point Up-Convert Interchange Format Right | |
FEXUPR.W wd,ws |
MSA |
Vector Floating-Point Up-Convert Interchange Format Right |
FEXUPR.D wd,ws |
MSA |
Vector Floating-Point Up-Convert Interchange Format Right |
Vector Floating-Point Up-Convert Interchange Format Right
Vector right elements conversion to wider interchange format.
wd[i] = up_convert(right_half(ws)[i])
The right half floating-point elements in vector ws are up-converted to a larger interchange format, i.e. from 16-bit to
32-bit, or from 32-bit to 64-bit. The result is written to vector wd.
The format up-conversion operation is defined by the IEEE Standard for Floating-Point Arithmetic 754TM-2008.
16-bit floating-point inputs are not affected by the flush-to-zero bit FS in MSA Control and Status Register MSACSR.
The operands are values in floating-point data format half the size of df. The results are floating-point values in data format df.
Data-dependent exceptions are poss ible as s pecified by the I EEE Standard for Floating-Point Arithmetic 754TM2008.
FEXUPR.W for i in 0 .. WRLEN/32-1 f = UpConvertFP(WR[ws]16i+15..16i, 16) WR[wd]32i+31..32i = f endfor FEXUPR.D for i in 0 .. WRLEN/64-1 f = UpConvertFP(WR[ws]32i+31..32i, 32) WR[wd]64i+63..64i = f endfor function UpConvertFP(tt, n) /* Implementation defined format up-conversion. */ endfunction UpConvertFP
Reserved Instruction Exception, MSA Disabled Exception, MSA Floating Point Exception.