Encoding:

Format:

CTCMSA 

CTCMSA cd,rs

Purpose:

GPR Copy to MSA Control Register

GPR value copied to MSA control register.

Description:

cd = rs

The content of the least significant 31 bits of GPR rs is copied to MSA control register cd.

Writing to the MSA Control and Status Register MSACSR causes the appropriate e xception if any Cause bit and its corresponding Enable bit are both set. The register is written before the exception occurs and the EPC register contains the address of the CTCMSA instruction.

Restrictions:

The write attempt is IGNORED if cd specifies a reserved register or a register that does not exist or is not writable.

Operation:

if cd = 1 then
   MSACSR = GPR[rs]31..0
   if MSACSRCause and (1 || MSACSREnables) != 0 then
      SignalException(MSAFloatingPointException)
   endif
elseif MSAIRWRP = 1 then
   if cd = 3 then
      if not IsCoprocessorEnabled(0) then
         SignalException(CoprocessorUnusableException, 0)
      endif
      MSASave = GPR[rs]31..0
   elseif cd = 4 then
      if not IsCoprocessorEnabled(0) then
         SignalException(CoprocessorUnusableException, 0)
      endif
      MSAModify = GPR[rs]31..0
   elseif cd = 6 then
      if not IsCoprocessorEnabled(0) then
         SignalException(CoprocessorUnusableException, 0)
      endif
      MSAMap = GPR[rs]31..0
   elseif cd = 7 then
      if not IsCoprocessorEnabled(0) then
         SignalException(CoprocessorUnusableException, 0)
      endif
      MSAUnmap = GPR[rs]31..0
   endif
endif

Exceptions:

Reserved Instruction Exception, MSA Disabled Exception, MSA Floating Point Exception. Coprocessor 0 Unusable

Exception.