COP1 010001 |
110 |
df |
wt |
s16 |
6 |
3 |
2 |
5 |
16 |
BZ.df |
Immediate Branch If At Least One Element Is Zero | |
BZ.B wt,s16 |
MSA |
Immediate Branch If At Least One Element Is Zero |
BZ.H wt,s16 |
MSA |
Immediate Branch If At Least One Element Is Zero |
BZ.W wt,s16 |
MSA |
Immediate Branch If At Least One Element Is Zero |
BZ.D wt,s16 |
MSA |
Immediate Branch If At Least One Element Is Zero |
Immediate Branch If At Least One Element Is Zero
Immediate PC offset branch if at least one destination element is zero.
if wt[i] = 0 for some i then branch PC-relative s16
PC-relative branch if at least one element in wt is zero. The branch instruction has a delay slot. s16 is a PC word offset, i.e. signed count of 32-bit instructions, from the PC of the delay slot.
Processor operation is UNPREDICTABLE if a branch is placed in the delay slot of a branch or jump.
BZ.B: for i in 0 .. WRLEN/8-1 branch(WR[wt]8i+7..8i = 0, s16) endfor BZ.H: for i in 0 .. WRLEN/16-1 branch(WR[wt]16i+15..16i = 0, s16) endfor BZ.W: for i in 0 .. WRLEN/32-1 branch(WR[wt]32i+31..32i = 0, s16) endfor BZ.D: for i in 0 .. WRLEN/64-1 branch(WR[wt]64i+63..64i = 0, s16) endfor function branch(cond, offset) if cond then I: target_offset = (offset9)GPRLEN-12 || offset9..0 || 0^^2 I+1: PC = PC + target_offset endif endfunction branch
Reserved Instruction Exception, MSA Disabled Exception.