MSA 011110 |
100 |
df |
wt |
ws |
wd |
3R 001101 |
6 |
3 |
2 |
5 |
5 |
5 |
6 |
BSET.df |
Vector Bit Set | |
BSET.B wd,ws,wt |
MSA |
Vector Bit Set |
BSET.H wd,ws,wt |
MSA |
Vector Bit Set |
BSET.W wd,ws,wt |
MSA |
Vector Bit Set |
BSET.D wd,ws,wt |
MSA |
Vector Bit Set |
Vector Bit Set
Vector selected bit position set in each element.
wd[i] = bit_set(ws[i], wt[i])
Set to 1 one bit in each element of v ector ws. The bit position is given by the elements in wt modulo the size of the element in bits. The result is written to vector wd.
The operands and results are values in integer data format df.
No data-dependent exceptions are possible.
BSET_S.B: for i in 0 .. WRLEN/8-1 t = WR[wt]8i+2..8i WR[wd]8i+7..8i = WR[ws]8i+7..8i or (07-t || 1 || 0t) endfor BSET_S.H: for i in 0 .. WRLEN/16-1 t = WR[wt]16i+3..16i WR[wd]16i+15..16i = WR[ws]16i+15..16i or (015-t || 1 || 0t) endfor BSET_S.W: for i in 0 .. WRLEN/32-1 t = WR[wt]32i+4..32i WR[wd]32i+31..32i = WR[ws]32i+31..32i or (031-t || 1 || 0t) endfor BSET_S.D: for i in 0 .. WRLEN/64-1 t = WR[wt]64i+5..64i WR[wd]64i+63..64i = WR[ws]64i+63..64i or (063-t || 1 || 0t) endfor
Reserved Instruction Exception, MSA Disabled Exception.