COP1 010001 |
111 |
df |
wt |
s16 |
6 |
3 |
2 |
5 |
16 |
BNZ.df |
Immediate Branch If All Elements Are Not Zero | |
BNZ.B wt,s16 |
MSA |
Immediate Branch If All Elements Are Not Zero |
BNZ.H wt,s16 |
MSA |
Immediate Branch If All Elements Are Not Zero |
BNZ.W wt,s16 |
MSA |
Immediate Branch If All Elements Are Not Zero |
BNZ.D wt,s16 |
MSA |
Immediate Branch If All Elements Are Not Zero |
Immediate Branch If All Elements Are Not Zero
Immediate PC offset branch if all destination elements are not zero.
if wt[i] != 0 for all i then branch PC-relative s16
PC-relative branch if all elements in wt are not zero. The branch instruction has a delay slot. s16 is a PC word offset, i.e. signed count of 32-bit instructions, from the PC of the delay slot.
Processor operation is UNPREDICTABLE if a branch is placed in the delay slot of a branch or jump.
BNZ.B: branch(WR[wt]8i+7..8i != 0 for all i, s16) BNZ.H: branch(WR[wt]16i+15..16i != 0 for all i, s16) BNZ.W: branch(WR[wt]32i+31..32i != 0 for all i, s16) BNZ.D: branch(WR[wt]64i+63..64i != 0 for all i, s16) function branch(cond, offset) if cond then I: target_offset = (offset9)GPRLEN-12 || offset9..0 || 0^^2 I+1: PC = PC + target_offset endif endfunction branch
Reserved Instruction Exception, MSA Disabled Exception.