Encoding:

MSA

011110

101

df

wt

ws

wd

3R

001101

6

3

2

5

5

5

6

Format: 

BNEG.df

Vector Bit Negate

BNEG.B wd,ws,wt

MSA

Vector Bit Negate

BNEG.H wd,ws,wt

MSA

Vector Bit Negate

BNEG.W wd,ws,wt

MSA

Vector Bit Negate

BNEG.D wd,ws,wt

MSA

Vector Bit Negate

Purpose:

Vector Bit Negate

Vector selected bit position negate in each element.

Description: 

wd[i] = bit_negate(ws[i], wt[i])

Negate (complement) one bit in each element of vector ws. The bit position is given by the elements in wt modulo the size of the element in bits. The result is written to vector wd.

The operands and results are values in integer data format df.

Restrictions:

No data-dependent exceptions are possible.

Operation: 

BNEG.B:
   for i in 0 .. WRLEN/8-1
      t = WR[wt]8i+2..8i
      WR[wd]8i+7..8i = WR[ws]8i+7..8i xor (07-t || 1 || 0t)
   endfor
BNEG.H:
   for i in 0 .. WRLEN/16-1
      t = WR[wt]16i+3..16i
      WR[wd]16i+15..16i = WR[ws]16i+15..16i xor (015-t || 1 || 0t)
   endfor
BNEG.W:
   for i in 0 .. WRLEN/32-1
      t = WR[wt]32i+4..32i
      WR[wd]32i+31..32i = WR[ws]32i+31..32i xor (031-t || 1 || 0t)
   endfor
BNEG.D:
   for i in 0 .. WRLEN/64-1
      t = WR[wt]64i+5..64i
      WR[wd]64i+63..64i = WR[ws]64i+63..64i xor (063-t || 1 || 0t)
   endfor

Exceptions:

Reserved Instruction Exception, MSA Disabled Exception.