|
SPECIAL3 011111 |
0 00000 |
rt |
rd |
REPLV.QB 00011 |
ABSQ_S.PH 010010 |
|
6 |
5 |
5 |
5 |
5 |
6 |
REPLV.QB rd, rt |
MIPSDSP |
Replicate Byte into all Vector Element Positions |
Replicate Byte into all Vector Element Positions
Replicate a variable byte into all elements of a quad byte vector.
rd = sign_extend(rt7..0 || rt7..0 || rt7..0 || rt7..0)
The right-most byte value in register rt is replicated into the four right-most byte elements of destination register rd.
The sign of the source byte value is extended into the 32 most-significant bits of the destination register.
No data-dependent exceptions are possible.
The operands must be values in the specified format. If they are not, the results are UNPREDICTABLE and the values of the operand vectors become UNPREDICTABLE.
temp7..0 = GPR[rt]7..0 GPR[rd]63..0 = (temp7)32 || temp7..0 || temp7..0 || temp7..0 || temp7..0
Reserved Instruction, DSP Disabled