Encoding:

POOL32F

010101

ft

fs

0

fmt

TRUNC.L

10001100

POOL32FXf

111011

6

5

5

1

1

8

6

Format:

TRUNC.L.fmt 

Floating Point Truncate to Long Fixed Point

TRUNC.L.S ft, fs

microMIPS

Floating Point Truncate to Long Fixed Point

TRUNC.L.D ft, fs

microMIPS

Floating Point Truncate to Long Fixed Point

Purpose:

Floating Point Truncate to Long Fixed Point

To convert an FP value to 64-bit fixed point, rounding toward zero.

Description:

 FPR[ft] = convert_and_round(FPR[fs])

The value in FPR fs, in format fmt, is converted to a value in 64-bit long-fixed point format and rounded toward zero

(rounding mode 1). The result is placed in FPR ft.

When the source value is Infinity, NaN, or rounds to an integer outside the range -263 to 263-1, the result cannot be represented correctly and an IEEE Invalid Operation condition exists. In this case the Invalid Operation flag is set in the FCSR. If the Invalid Operation Enable bit is set in the FCSR, no result is written to ft and an Invalid Operation exception is taken immediately. Otherwise, a default result is written to ft. On cores with FCSRNAN2008=0, the default result is 263-1. On cores with FCSRNAN2008=1, the default result is:

263-1 when the input value is +inf or rounds to a number larger than 263-1

Restrictions:

The fields fs and ft must specify valid FPRs: fs for type fmt and fd for long fixed point. If the fields are not valid, the result is UNPREDICTABLE.

The operand must be a value in format fmt; if it is not, the result is UNPREDICTABLE and the value of the operand

FPR becomes UNPREDICTABLE.

The result of this instruction is UNPREDICTABLE if the processor is executing in the FR=0 32-bit FPU register model; it is predictable if executing on a 64-bit FPU in the FR=1 mode, but not with FR=0, and not on a 32-bit FPU.

Operation:

StoreFPR(ft, L, ConvertFmt(ValueFPR(fs, fmt), fmt, L))

Exceptions:

Coprocessor Unusable, Reserved Instruction

Floating Point Exceptions:

Unimplemented Operation, Invalid Operation, Inexact