Encoding:

SWSP16

110010

rt

offset

6

5

5

Format: 

SWSP rt, left_shifted_offset(base)

microMIPS

Store Word to Stack Pointer (16-bit instr size)

Purpose:

Store Word to Stack Pointer (16-bit instr size)

To store a word to memory

Description: 

 memory[GPR[29] + (offset <= 4)] = GPR[rt]

The least-significant 32-bit word of GPR rt is stored in memory at the location specified by the aligned effective address. The 5-bit signed offset is left shifted by two bits, zero-extended and then is added to the contents of GPR 29 to form the effective address.

Restrictions:

The effective address must be naturally-aligned. If either of the 2 least-significant bits of the address is non-zero, an

Address Error exception occurs.

Providing misaligned support for Release 6 is not a requirement for this instruction.

Operation: 

vAddr = zero_extend(offset|| 02) + GPR[29]
if vAddr1..0 != 02 then
   SignalException(AddressError)
endif
(pAddr, CCA) = AddressTranslation (vAddr, DATA, STORE)
pAddr = pAddrPSIZE-1..3 || (pAddr2..0 xor (ReverseEndian || 02))
bytesel = vAddr2..0 xor (BigEndianCPU || 02)
datadoubleword = GPR[rt]63-8*bytesel..0 || 08*bytesel
StoreMemory (CCA, WORD, datadoubleword, pAddr, vAddr, DATA)

Exceptions:

TLB Refill, TLB Invalid, TLB Modified, Address Error, Watch