POOL32A 000000 |
rt |
rs |
rd |
0 |
SUB 0110010000 |
6 |
5 |
5 |
5 |
1 |
10 |
SUB rd, rs, rt |
microMIPS |
Subtract Word |
Subtract Word
To subtract 32-bit integers. If overflow occurs, then trap.
GPR[rd] = GPR[rs] - GPR[rt]
The 32-bit word value in GPR rt is subtracted from the 32-bit value in GPR rs to produce a 32-bit result. If the subtraction results in 32-bit 2's complement arithmetic overflow, then the destination register is not modified and an Integer Overflow exception occurs. If it does not overflow, the 32-bit result is sign-extended and placed into GPR rd.
On 64-bit processors, if either GPR rt or GPR rs does not contain sign-extended 32-bit values (bits 63..31 equal), then the result of the operation is UNPREDICTABLE.
if NotWordValue(GPR[rs]) or NotWordValue(GPR[rt]) then UNPREDICTABLE endif temp = (GPR[rs]31||GPR[rs]31..0) - (GPR[rt]31||GPR[rt]31..0) if temp32 != temp31 then SignalException(IntegerOverflow) else GPR[rd] = sign_extend(temp31..0) endif
Integer Overflow
SUBU performs the same arithmetic operation but does not trap on overflow.