| 
 POOL16B 001001  | 
 rd  | 
 rt  | 
 encoded sa  | 
 0  | 
| 
 6  | 
 3  | 
 3  | 
 3  | 
 1  | 
SLL16 rd, rt, decoded_sa  | 
 microMIPS  | 
 Shift Word Left Logical (16-bit instr size)  | 
Shift Word Left Logical (16-bit instr size)
To left-shift a word by a fixed number of bits
GPR[rd] = GPR[rt] << decoded_sa
The contents of the low-order 32-bit word of GPR rt are shifted left, inserting zeros into the emptied bits; the word result is sign-extended and placed in GPR rd. The bit-shift amount is specified by decoding the encoded_sa field.
Table 5.15 lists the encoded values of the encoded_sa field and the actual bit shift amount values.
Table 5.15 Shift Amount Field Encoding
| 
 Encoded Input (Hex)  | 
 Decoded Value (Decimal)  | 
| 
 0  | 
 8  | 
| 
 1  | 
 1  | 
| 
 2  | 
 2  | 
| 
 3  | 
 3  | 
| 
 4  | 
 4  | 
| 
 5  | 
 5  | 
| 
 6  | 
 6  | 
| 
 7  | 
 7  | 
The 3-bit register fields can only specify GPRs $2-$7, $16, $17.
decoded_sa = DECODE(encoded_sa) s = decoded_sa temp = GPR[rt](31-s)..0 || 0s GPR[rd] = sign_extend(temp)
None
Unlike nearly all other word operations, the SLL input operand does not have to be a properly sign-extended word value to produce a valid sign-extended 32-bit result. The result word is always sign-extended into a 64-bit destination register; this instruction with a zero shift amount truncates a 64-bit value to 32 bits and sign-extends it.